1. Field of the Invention
The present invention relates to a flash memory, and more particularly, to a flash memory management method for use in a flash memory-based system. The present application is based on Korean Patent Application No. 2001-31124 filed Jun. 4, 2001.
2. Description of the Related Art
Flash memories are a special type of a nonvolatile memory capable of electrically erasing and programming data. Flash memory based storage devices have low power consumption and small size compared to magnetic disc memory based devices. Thus, since flash memories can be substituted for magnetic disk memories, much research and development is actively in progress. Flash memories are expected to receive considerable attention as storage devices for mobile computing devices such as digital cameras, mobile phones, or personal digital assistants (PDAs).
In magnetic disc drives, new data can be written over previous old data. However, in flash memories, a block needs to be erased before it is rewritten with new data; that is, memory cells are returned to an original state in which data can be written. This operation is called “erase”. An erase operation typically requires much more time than a write operation. Furthermore, since the erase operation is performed in blocks whose size is much larger than what the write operation requires, even a portion requested not to be written to may be erased. In this case, the unnecessarily erased portion needs to be reclaimed through a write operation. In the worst scenario, a request to write (overwrite) data requires one erase operation and write operations to recover the portion erased by the erase operation. Due to inconsistency between units on which erase and write commands are executed, write performance is significantly lower than read performance. Furthermore, the write performance of a flash memory is lower than that of a magnetic disc based storage device that inevitably involves a delay due to mechanical operation. Thus, improving write performance is essential in designing a flash memory based device.
U.S. Pat. No. 5,388,083 proposes a content addressable memory (CAM) system for converting a logical address requested by a user to a physical address in a flash memory while avoiding an erase cycle by writing altered data into an empty block in order to prevent a delay due to erase-before-write. However, implementation of the CAM system requires additional costly circuits. U.S. Pat. No. 5,485,595 proposes an approach which involves writing a logical address into an extra region of each page and sequentially comparing each of the logical addresses while avoiding an erase cycle by writing altered data into an empty space upon a write request. However, if a unit of read operation is large like in a NAND-type flash memory, the address conversion mechanism requires a large amount of time in reading address conversion information scattered around the flash memory, thereby degrading system performance.
U.S. Pat. No. 5,845,313 proposes a flash memory storage architecture in which a linear address conversion table for performing a direct address conversion is constructed in a special RAM by scanning a logical address stored in a flash memory during a system reset. However, a RAM of a large storage capacity is required to store the address conversion table. For example, to store an address conversion table of a flash memory based storage device having a storage capacity of 32 MB and a page size of 512 bytes, 128 KB of RAM is required assuming that 2 bytes are provided for each of 65,536 pages. The storage capacity is too large for a small-scale system having few resources such as mobile equipment.
U.S. Pat. No. 5,404,485 proposes an approach for allocating a new block (replacement block) for write operation and writing data to the allocated block. However, since a new block continues to be allocated for write operation, a plurality of different versions of blocks to which the same page is written exist. That is, at least one replacement block needs to be provided for every block, thereby significantly reducing the capacity of a flash memory. A page to be written to a new block must be written at the same position as the position at which the page was written to the previous block. When the page is frequently updated but the remaining pages are rarely updated, only the content of the specific page is changed while the remaining pages contain a plurality of the same replacement blocks, thereby wasting a lot of storage space in a flash memory. Thus, this approach is not suitable for small-scale systems such as mobile equipment.